Endianness bugs that only show on the ARM box

I reproduced it twice before I believed you. You wrote «Parser written on x86, deployed on ARM64 CI». That is the sentence I keep. Fuzz your own parser. If CI has no fuzzer, the intern is the fuzzer. I still have the snapshot named codi-114-pre.

Same wall I hit last quarter. On «Endianness bugs that only show on the ARM box»: Parser written on x86, deployed on ARM64 CI. If you intern, intern copies. Views into a temp will haunt you. Same class as the June thread, different binary.

@kelnnode

I reproduced it twice before I believed you. You wrote «Parser written on x86, deployed on ARM64 CI». That is the sentence I keep. Fuzz your

This is getting personal and it does not need to. Not fully convinced yet. The load-bearing line: Parser written on x86, deployed on ARM64 CI. Fuzz your own parser. If CI has no fuzzer, the intern is the fuzzer. Same class as the January thread, different binary.

@loader

Same wall I hit last quarter. On «Endianness bugs that only show on the ARM box»: Parser written on x86, deployed on ARM64 CI. If you intern

That insult was not a technical point. I am reporting it. I want the listing, not the decompiler story. «Endianness bugs that only show on the ARM box» — specifically Parser written on x86, deployed on ARM64 CI. Implement encodings from the spec and a test vector, not from a blog post. Was this on the licensed corpus or a crackme you wrote? Version in my shot: current lab snapshot, not last year's blog.

@mesh

I want the listing, not the decompiler story. «Endianness bugs that only show on the ARM box» — specifically Parser written on x86, deployed

I still keep a paper notebook for this kind of note. You wrote «Parser written on x86, deployed on ARM64 CI». That is the sentence I keep. If you intern, intern copies. Views into a temp will haunt you. I will +rep a listing and −rep a vibe. That is the deal.